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Ordering circuit establishment in multiplane NoCs.

, , and . ACM Trans. Design Autom. Electr. Syst., 18 (4): 49:1-49:33 (2013)

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Minimizing expected energy consumption for streaming applications with linear dependencies on chip multiprocessors., , and . SIES, page 100-109. IEEE, (2009)Codesign of NoC and Cache Organization for Reducing Access Latency in Chip Multiprocessors., , and . IEEE Trans. Parallel Distributed Syst., 23 (6): 1038-1046 (2012)Ordering circuit establishment in multiplane NoCs., , and . ACM Trans. Design Autom. Electr. Syst., 18 (4): 49:1-49:33 (2013)An Experimental Comparison of Speed Scaling Algorithms with Deadline Feasibility Constraints., , and . Algorithm Engineering, volume 10261 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2010)Compiler-assisted data distribution for chip multiprocessors., , , and . PACT, page 501-512. ACM, (2010)Proactive circuit allocation in multiplane NoCs., , and . DAC, page 35:1-35:10. ACM, (2013)Déjà Vu Switching for Multiplane NoCs., , and . NOCS, page 11-18. IEEE Computer Society, (2012)NoC-aware cache design for multithreaded execution on tiled chip multiprocessors., , and . HiPEAC, page 197-205. ACM, (2011)GPU Performance Estimation using Software Rasterization and Machine Learning., , , , and . ACM Trans. Embed. Comput. Syst., 16 (5s): 148:1-148:21 (2017)An Experimental Comparison of Speed Scaling Algorithms with Deadline Feasibility Constraints., , and . CoRR, (2013)