Author of the publication

Ordering circuit establishment in multiplane NoCs.

, , and . ACM Trans. Design Autom. Electr. Syst., 18 (4): 49:1-49:33 (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Efficient CAD development for emerging technologies using Objective-C and Cocoa., , and . ICECS, page 369-372. IEEE, (2004)A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory., , , and . ISCAS, IEEE, (2006)A VLIW Processor With Hardware Functions: Increasing Performance While Reducing Power., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (11): 1250-1254 (2006)A Variable Length Coding Framework for Cost Function Reduction in Non-Volatile Memory Systems., , and . CoRR, (2017)EDA for extreme scale systems: design abstractions, metrics, and benchmarks.. ACM Great Lakes Symposium on VLSI, page 285-286. ACM, (2014)A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks., , , , and . J. Parallel Distributed Comput., 65 (10): 1237-1252 (2005)Toward Comprehensive Shifting Fault Tolerance for Domain-Wall Memories With PIETT., , , , , and . IEEE Trans. Computers, 72 (4): 1095-1109 (April 2023)Ordering circuit establishment in multiplane NoCs., , and . ACM Trans. Design Autom. Electr. Syst., 18 (4): 49:1-49:33 (2013)Brain-inspired Cognition in Next-generation Racetrack Memories., , , , , and . ACM Trans. Embed. Comput. Syst., 21 (6): 79:1-79:28 (November 2022)REFRESH FPGAs: Sustainable FPGA Chiplet Architectures., , , , , , , , and . CoRR, (2023)