Author of the publication

Critical paths in circuits with level-sensitive latches.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 3 (2): 273-291 (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Critical paths in circuits with level-sensitive latches., , and . IEEE Trans. Very Large Scale Integr. Syst., 3 (2): 273-291 (1995)The Aurora RAM Compiler., , , , and . DAC, page 261-266. ACM Press, (1995)Analysis and Design of Latch-Controlled Synchronous Digital Circuits., , and . DAC, page 111-117. IEEE Computer Society Press, (1990)Transistor placement for noncomplementary digital VLSI cell synthesis., and . ACM Trans. Design Autom. Electr. Syst., 8 (1): 81-107 (2003)Incorporating user control in automated interactive scheduling systems., , , , and . Conference on Designing Interactive Systems, page 306-309. ACM, (2010)euforia: Complete Software Model Checking with Uninterpreted Functions., and . VMCAI, volume 11388 of Lecture Notes in Computer Science, page 363-385. Springer, (2019)A first-order charge conserving MOS capacitance model., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (1): 99-108 (1990)Satisfiability models and algorithms for circuit delay computation., , , and . ACM Trans. Design Autom. Electr. Syst., 7 (1): 137-158 (2002)Efficient Symmetry Breaking for Boolean Satisfiability., , and . IJCAI, page 271-276. Morgan Kaufmann, (2003)Identifying Conflicts in Overconstrained Temporal Problems., , , and . IJCAI, page 205-211. Professional Book Center, (2005)