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Другие публикации лиц с тем же именем

Formal method for self-timed design., , и . EURO-DAC, стр. 197-201. EEE Computer Society, (1991)A Structural Approach for the Analysis of Petri Nets by Reduced Unfoldings., , , и . Application and Theory of Petri Nets, том 1091 из Lecture Notes in Computer Science, стр. 346-365. Springer, (1996)Checking Delay-Insensitivity: 104 Gates and Beyond., , , , и . ASYNC, стр. 149-157. IEEE Computer Society, (2002)The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems., , , , и . Journal of Circuits, Systems, and Computers, 8 (1): 67-118 (1998)Elastic Circuits., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (10): 1437-1455 (2009)Delay Insensitive Encoding and Power Analysis: A Balancing Act., , , , , и . ASYNC, стр. 116-125. IEEE Computer Society, (2005)Lazy transition systems: application to timing optimization of asynchronous circuits., , , , , и . ICCAD, стр. 324-331. ACM / IEEE Computer Society, (1998)DPA on Faulty Cryptographic Hardware and Countermeasures., , и . FDTC, том 4236 из Lecture Notes in Computer Science, стр. 211-222. Springer, (2006)Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems., , , , и . PDP, стр. 220-226. IEEE, (1994)Specification and analysis of self-timed circuits., , и . VLSI Signal Processing, 7 (1-2): 117-135 (1994)