%0 Conference Paper %1 conf/glvlsi/ChalivendraHV11 %A Chalivendra, Gayathri %A Hanumaiah, Vinay %A Vrudhula, Sarma B. K. %B ACM Great Lakes Symposium on VLSI %D 2011 %E Atienza, David %E Xie, Yuan %E Ayala, José L. %E Stevens, Ken S. %I ACM %K dblp %P 139-144 %T A new balanced 4-moduli set 2k, 2n - 1, 2n + 1, 2n+1-1 and its reverse converter design for efficient fir filter implementation. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2011.html#ChalivendraHV11 %@ 978-1-4503-0667-6

@inproceedings{conf/glvlsi/ChalivendraHV11, added-at = {2018-11-06T00:00:00.000+0100}, author = {Chalivendra, Gayathri and Hanumaiah, Vinay and Vrudhula, Sarma B. K.}, biburl = {https://www.bibsonomy.org/bibtex/27e7ffbb81946ff83abae04b44089483b/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2011}, editor = {Atienza, David and Xie, Yuan and Ayala, José L. and Stevens, Ken S.}, ee = {https://doi.org/10.1145/1973009.1973038}, interhash = {02f13b3de740ef4a9880c53626fd372a}, intrahash = {7e7ffbb81946ff83abae04b44089483b}, isbn = {978-1-4503-0667-6}, keywords = {dblp}, pages = {139-144}, publisher = {ACM}, timestamp = {2018-11-07T14:24:41.000+0100}, title = {A new balanced 4-moduli set {2k, 2n - 1, 2n + 1, 2n+1-1} and its reverse converter design for efficient fir filter implementation.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2011.html#ChalivendraHV11}, year = 2011 }