%0 Conference Paper %1 conf/dac/KolheSGKRPSMH22 %A Kolhe, Gaurav %A Sheaves, Tyler %A Gubbi, Kevin Immanuel %A Kadale, Tejas %A Rafatirad, Setareh %A D., Sai Manoj P. %A Sasan, Avesta %A Mahmoodi, Hamid %A Homayoun, Houman %B DAC %D 2022 %E Oshana, Rob %I ACM %K dblp %P 1189-1194 %T Silicon validation of LUT-based logic-locked IP cores. %U http://dblp.uni-trier.de/db/conf/dac/dac2022.html#KolheSGKRPSMH22 %@ 978-1-4503-9142-9

@inproceedings{conf/dac/KolheSGKRPSMH22, added-at = {2023-09-30T00:00:00.000+0200}, author = {Kolhe, Gaurav and Sheaves, Tyler and Gubbi, Kevin Immanuel and Kadale, Tejas and Rafatirad, Setareh and D., Sai Manoj P. and Sasan, Avesta and Mahmoodi, Hamid and Homayoun, Houman}, biburl = {https://www.bibsonomy.org/bibtex/21bdaa66e85c0c2fabb21d92c54017af2/dblp}, booktitle = {DAC}, crossref = {conf/dac/2022}, editor = {Oshana, Rob}, ee = {https://doi.org/10.1145/3489517.3530606}, interhash = {0a4c0b872e873944d0cc09cd6cba1e9d}, intrahash = {1bdaa66e85c0c2fabb21d92c54017af2}, isbn = {978-1-4503-9142-9}, keywords = {dblp}, pages = {1189-1194}, publisher = {ACM}, timestamp = {2024-04-10T01:57:45.000+0200}, title = {Silicon validation of LUT-based logic-locked IP cores.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2022.html#KolheSGKRPSMH22}, year = 2022 }