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65NM sub-threshold 11T-SRAM for ultra low voltage applications., , , , and . SoCC, page 113-118. IEEE, (2008)Robust Sense Amplifier Design under Random Dopant Fluctuations in Nano-Scale CMOS Technologies., and . SoCC, page 261-264. IEEE, (2006)Impact of transistor aging effects on sense amplifier reliability in nano-scale CMOS., and . ISQED, page 342-346. IEEE, (2012)Comparative analysis of hybrid Magnetic Tunnel Junction and CMOS logic circuits., , , and . SoCC, page 259-264. IEEE, (2016)A low-power SRAM using bit-line charge-recycling technique., , and . ISLPED, page 177-182. ACM, (2007)An analytical model for read static noise margin including soft oxide breakdown, negative and positive bias temperature instabilities., , , and . Microelectron. Reliab., 53 (5): 670-675 (2013)On Custom LUT-based Obfuscation., , , , , and . ACM Great Lakes Symposium on VLSI, page 477-482. ACM, (2019)Silicon validation of LUT-based logic-locked IP cores., , , , , , , , and . DAC, page 1189-1194. ACM, (2022)Process Variation Tolerant Online Current Monitor for Robust Systems., , , and . IOLTS, page 171-176. IEEE Computer Society, (2005)Low-overhead design technique for calibration of maximum frequency at multiple operating points., , , and . ICCAD, page 401-404. IEEE Computer Society, (2007)