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Silicon validation of LUT-based logic-locked IP cores.

G. Kolhe, T. Sheaves, K. Gubbi, T. Kadale, S. Rafatirad, S. D., A. Sasan, H. Mahmoodi, and H. Homayoun. DAC, page 1189-1194. ACM, (2022)

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Gudrun Tyler

Kerstin Tyler

Tyler Crain

Tyler Moore

Tyler James Frazier

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Hardware Trojan Detection Using Machine Learning: A Tutorial.K. Gubbi, B. Latibari, A. Srikanth, T. Sheaves, S. Beheshti-Shirazi, S. PD, S. Rafatirad, A. Sasan, H. Homayoun, and S. Salehi. ACM Trans. Embed. Comput. Syst., 22 (3): 46:1-46:26 (2023)On the Performance of Malware Detection Classifiers Using Hardware Performance Counters.A. Zeraatkar, P. Kamran, I. Kaur, N. Ramu, T. Sheaves, and H. Al-Asaad. SmartNets, page 1-6. IEEE, (2024)Gotcha! I Know What You Are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links.C. Fang, N. Miao, H. Wang, J. Zhou, T. Sheaves, J. Emmert, A. Sasan, and H. Homayoun. CCS, page 2024-2037. ACM, (2023)Silicon validation of LUT-based logic-locked IP cores.G. Kolhe, T. Sheaves, K. Gubbi, T. Kadale, S. Rafatirad, S. D., A. Sasan, H. Mahmoodi, and H. Homayoun. DAC, page 1189-1194. ACM, (2022)Scalable MatMul-free Language ModelingR. Zhu, Y. Zhang, E. Sifferman, T. Sheaves, Y. Wang, D. Richmond, P. Zhou, and J. Eshraghian. (2024)Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality.G. Kolhe, H. Kamali, M. Naicker, T. Sheaves, H. Mahmoodi, S. D., H. Homayoun, S. Rafatirad, and A. Sasan. ICCAD, page 1-8. ACM, (2019)Static Design of Spin Transfer Torques Magnetic Look Up Tables for ASIC Designs.A. Attaran, T. Sheaves, P. Mugula, and H. Mahmoodi. ACM Great Lakes Symposium on VLSI, page 507-510. ACM, (2018)Neuromorphic-Enabled Security for IoT.S. Salehi, T. Sheaves, K. Gubbi, S. Beheshti, S. D., S. Rafatirad, A. Sasan, T. Mohsenin, and H. Homayoun. NEWCAS, page 153-157. IEEE, (2022)Survey of Machine Learning for Electronic Design Automation.K. Gubbi, S. Beheshti-Shirazi, T. Sheaves, S. Salehi, S. D., S. Rafatirad, A. Sasan, and H. Homayoun. ACM Great Lakes Symposium on VLSI, page 513-518. ACM, (2022)Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks.G. Kolhe, S. Salehi, T. Sheaves, H. Homayoun, S. Rafatirad, S. D., and A. Sasan. DAC, page 229-234. IEEE, (2021)

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Disambiguation of "Sheaves, Tyler"

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Silicon validation of LUT-based logic-locked IP cores.

Please choose a person to relate this publication to

Gudrun Tyler

Kerstin Tyler

Tyler Crain

Tyler Moore

Tyler James Frazier

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Sheaves, Tyler"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Silicon validation of LUT-based logic-locked IP cores.

Please choose a person to relate this publication to

Gudrun Tyler

Kerstin Tyler

Tyler Crain

Tyler Moore

Tyler James Frazier

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Silicon validation of LUT-based logic-locked IP cores.