%0 Journal Article %1 journals/tvlsi/ZhanOGZ016 %A Zhan, Jia %A Ouyang, Jin %A Ge, Fen %A Zhao, Jishen %A Xie, Yuan %D 2016 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 10 %P 3041-3054 %T Hybrid Drowsy SRAM and STT-RAM Buffer Designs for Dark-Silicon-Aware NoC. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#ZhanOGZ016 %V 24

@article{journals/tvlsi/ZhanOGZ016, added-at = {2020-03-11T00:00:00.000+0100}, author = {Zhan, Jia and Ouyang, Jin and Ge, Fen and Zhao, Jishen and Xie, Yuan}, biburl = {https://www.bibsonomy.org/bibtex/2c9d726f64571911df8bade36c72cc7af/dblp}, ee = {https://doi.org/10.1109/TVLSI.2016.2536747}, interhash = {1e68afaf84c16c18ff529942c8676dfa}, intrahash = {c9d726f64571911df8bade36c72cc7af}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 10, pages = {3041-3054}, timestamp = {2020-03-12T11:41:44.000+0100}, title = {Hybrid Drowsy SRAM and STT-RAM Buffer Designs for Dark-Silicon-Aware NoC.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#ZhanOGZ016}, volume = 24, year = 2016 }