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%0 Conference Paper
%1 conf/recosoc/RodriguezVCPTR15
%A Rodríguez, Alfonso
%A Valverde, Juan
%A Castanares, Cesar
%A Portilla, Jorge
%A de la Torre, Eduardo
%A Riesgo, Teresa
%B ReCoSoC
%D 2015
%I IEEE
%K dblp
%P 1-8
%T Execution modeling in self-aware FPGA-based architectures for efficient resource management.
%U http://dblp.uni-trier.de/db/conf/recosoc/recosoc2015.html#RodriguezVCPTR15
%@ 978-1-4673-7942-7
@inproceedings{conf/recosoc/RodriguezVCPTR15,
added-at = {2019-12-03T00:00:00.000+0100},
author = {Rodríguez, Alfonso and Valverde, Juan and Castanares, Cesar and Portilla, Jorge and de la Torre, Eduardo and Riesgo, Teresa},
biburl = {https://www.bibsonomy.org/bibtex/2c8067bc60c67e2e2bc811b2cb9c4155d/dblp},
booktitle = {ReCoSoC},
crossref = {conf/recosoc/2015},
ee = {https://doi.org/10.1109/ReCoSoC.2015.7238086},
interhash = {3226a16e7ab1e3f04bc53ba2ee7d5224},
intrahash = {c8067bc60c67e2e2bc811b2cb9c4155d},
isbn = {978-1-4673-7942-7},
keywords = {dblp},
pages = {1-8},
publisher = {IEEE},
timestamp = {2019-12-04T11:41:46.000+0100},
title = {Execution modeling in self-aware FPGA-based architectures for efficient resource management.},
url = {http://dblp.uni-trier.de/db/conf/recosoc/recosoc2015.html#RodriguezVCPTR15},
year = 2015
}