%0 Conference Paper %1 conf/vlsic/SuzukiNMMHSFIEO15 %A Suzuki, Daisuke %A Natsui, Masanori %A Mochizuki, Akira %A Miura, Sadahiko %A Honjo, Hiroaki %A Sato, Hideo %A Fukami, Shunsuke %A Ikeda, Shoji %A Endoh, Tetsuo %A Ohno, Hideo %A Hanyu, Takahiro %B VLSIC %D 2015 %I IEEE %K dblp %P 172- %T Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2015.html#SuzukiNMMHSFIEO15 %@ 978-4-86348-502-0

@inproceedings{conf/vlsic/SuzukiNMMHSFIEO15, added-at = {2022-10-02T00:00:00.000+0200}, author = {Suzuki, Daisuke and Natsui, Masanori and Mochizuki, Akira and Miura, Sadahiko and Honjo, Hiroaki and Sato, Hideo and Fukami, Shunsuke and Ikeda, Shoji and Endoh, Tetsuo and Ohno, Hideo and Hanyu, Takahiro}, biburl = {https://www.bibsonomy.org/bibtex/2bef375420d0733d649471d9f62f4dae3/dblp}, booktitle = {VLSIC}, crossref = {conf/vlsic/2015}, ee = {https://doi.org/10.1109/VLSIC.2015.7231371}, interhash = {5988d3750a07946ae97bb3fe77823b8e}, intrahash = {bef375420d0733d649471d9f62f4dae3}, isbn = {978-4-86348-502-0}, keywords = {dblp}, pages = {172-}, publisher = {IEEE}, timestamp = {2024-04-10T15:33:51.000+0200}, title = {Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2015.html#SuzukiNMMHSFIEO15}, year = 2015 }