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Complementary 5T-4MTJ nonvolatile TCAM cell circuit with phase-selective parallel writing scheme., , , , , , , и . IEICE Electron. Express, 11 (10): 20140297 (2014)Design of an energy-efficient 2T-2MTJ nonvolatile TCAM based on a parallel-serial-combined search scheme., , , , и . IEICE Electron. Express, 11 (3): 20131006 (2014)Design of a Microprocessor Datapath Using Four-Valued Differential-Pair Circuits., , , и . ISMVL, стр. 14. IEEE Computer Society, (2006)Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in LDPC Decoders., , и . ISMVL, стр. 138-143. IEEE Computer Society, (2005)High-Throughput Partially Parallel Inter-Chip Link Architecture for Asynchronous Multi-Chip NoCs., , , , , и . IEICE Trans. Inf. Syst., 97-D (6): 1546-1556 (2014)Multiple-Valued Arithmetic Integrated Circuits Based on 1.5V-Supply Dual-Rail Source-Coupled Logic., , и . ISMVL, стр. 64-71. IEEE Computer Society, (1995)Design of a Quaternary Single-Ended Current-Mode Circuit for an Energy-Efficient Inter-chip Asynchronous Communication Link., , и . ISMVL, стр. 67-72. IEEE Computer Society, (2014)Intra-Chip Address-Presetting Data-Transfer Scheme Using Four-Valued Encoding., , и . ISMVL, стр. 192-197. IEEE Computer Society, (2004)Highly reliable single-ended current-mode circuit for an inter-chip asynchronous communication link., , , и . APCCAS, стр. 683-686. IEEE, (2014)High-Performance Multiple-Valued Comparator Based on Active-Load Dual-Rail Differential Logic for Crosstalk-Noise Reduction., , и . ISMVL, стр. 57. IEEE Computer Society, (2007)