Inproceedings,
A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and ×4 half-page architecture.
K. Koo, S. Ok, Y. Kang, S. Kim, C. Song, H. Lee, H. Kim, Y. Kim, J. Lee, S. Oak, Y. Lee, J. Lee, J. Lee, H. Lee, J. Jang, J. Jung, B. Choi, Y. Kim, Y. Hur, Y. Kim, B. Chung, and Y. Kim.ISSCC, page 40-41. IEEE, (2012)
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- BibTeX key
- conf/isscc/KooOKKSLKKLOLLLLJJCKHKCK12
- entry type
- inproceedings
- booktitle
- ISSCC
- year
- 2012
- pages
- 40-41
- publisher
- IEEE
- crossref
- conf/isscc/2012
- ee
- https://doi.org/10.1109/ISSCC.2012.6176869
- isbn
- 978-1-4673-0376-7
- url
- http://dblp.uni-trier.de/db/conf/isscc/isscc2012.html#KooOKKSLKKLOLLLLJJCKHKCK12
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%1 conf/isscc/KooOKKSLKKLOLLLLJJCKHKCK12
%A Koo, Kibong
%A Ok, Sunghwa
%A Kang, Yonggu
%A Kim, Seungbong
%A Song, Choungki
%A Lee, Hyeyoung
%A Kim, Hyungsoo
%A Kim, Yongmi
%A Lee, Jeonghun
%A Oak, Seunghan
%A Lee, Yosep
%A Lee, Jungyu
%A Lee, Joongho
%A Lee, Hyungyu
%A Jang, Jaemin
%A Jung, Jongho
%A Choi, Byeongchan
%A Kim, Yong-Ju
%A Hur, Youngdo
%A Kim, Yunsaing
%A Chung, Byong-Tae
%A Kim, Yongtak
%B ISSCC
%D 2012
%I IEEE
%K dblp
%P 40-41
%T A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and ×4 half-page architecture.
%U http://dblp.uni-trier.de/db/conf/isscc/isscc2012.html#KooOKKSLKKLOLLLLJJCKHKCK12
%@ 978-1-4673-0376-7
@inproceedings{conf/isscc/KooOKKSLKKLOLLLLJJCKHKCK12,
added-at = {2021-01-11T00:00:00.000+0100},
author = {Koo, Kibong and Ok, Sunghwa and Kang, Yonggu and Kim, Seungbong and Song, Choungki and Lee, Hyeyoung and Kim, Hyungsoo and Kim, Yongmi and Lee, Jeonghun and Oak, Seunghan and Lee, Yosep and Lee, Jungyu and Lee, Joongho and Lee, Hyungyu and Jang, Jaemin and Jung, Jongho and Choi, Byeongchan and Kim, Yong-Ju and Hur, Youngdo and Kim, Yunsaing and Chung, Byong-Tae and Kim, Yongtak},
biburl = {https://www.bibsonomy.org/bibtex/2ccb24530c29f27a0b9862329128559e1/dblp},
booktitle = {ISSCC},
crossref = {conf/isscc/2012},
ee = {https://doi.org/10.1109/ISSCC.2012.6176869},
interhash = {5f7dd6c3a7cc6f5327b8e72c762e36f0},
intrahash = {ccb24530c29f27a0b9862329128559e1},
isbn = {978-1-4673-0376-7},
keywords = {dblp},
pages = {40-41},
publisher = {IEEE},
timestamp = {2024-04-10T11:03:25.000+0200},
title = {A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and ×4 half-page architecture.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2012.html#KooOKKSLKKLOLLLLJJCKHKCK12},
year = 2012
}