%0 Conference Paper %1 conf/aspdac/GuYLW17 %A Gu, Jiangyuan %A Yin, Shouyi %A Liu, Leibo %A Wei, Shaojun %B ASP-DAC %D 2017 %I IEEE %K dblp %P 312-317 %T Energy-aware loops mapping on multi-vdd CGRAs without performance degradation. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2017.html#GuYLW17 %@ 978-1-5090-1558-0

@inproceedings{conf/aspdac/GuYLW17, added-at = {2017-05-26T00:00:00.000+0200}, author = {Gu, Jiangyuan and Yin, Shouyi and Liu, Leibo and Wei, Shaojun}, biburl = {https://www.bibsonomy.org/bibtex/2bfb085ee81fe50a4fa1b920e626ba939/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2017}, ee = {https://doi.org/10.1109/ASPDAC.2017.7858341}, interhash = {6a4460b315ce1a78c5c0645b98dbe4d5}, intrahash = {bfb085ee81fe50a4fa1b920e626ba939}, isbn = {978-1-5090-1558-0}, keywords = {dblp}, pages = {312-317}, publisher = {IEEE}, timestamp = {2019-10-17T16:44:03.000+0200}, title = {Energy-aware loops mapping on multi-vdd CGRAs without performance degradation.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2017.html#GuYLW17}, year = 2017 }