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Disambiguation of "Gu, Jiangyuan"

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Energy-aware loops mapping on multi-vdd CGRAs without performance degradation.

, , , and . ASP-DAC, page 312-317. IEEE, (2017)

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Xuewu Gu

Xiaogang Gu

Wei Gu

Hyosong Gu

Jie Gu

 

Other publications of authors with the same name

TAEM: Fast Transfer-Aware Effective Loop Mapping for Heterogeneous Resources on CGRA., , , , and . DAC, page 1-6. IEEE, (2020)TAEM 2.0: A Faster Transfer-Aware Effective Loop Mapping for Heterogeneous Resources on CGRA., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (8): 2552-2565 (2023)Stress-Aware Loops Mapping on CGRAs with Considering NBTI Aging Effect., , and . DAC, page 40:1-40:6. ACM, (2017)Combining Memory Partitioning and Subtask Generation for Parallel Data Access on CGRAs., , , , and . ASP-DAC, page 204-209. ACM, (2021)RMP-MEM: A HW/SW Reconfigurable Multi-Port Memory Architecture for Multi-PEA Oriented CGRA., , , , , , , , and . DAC, page 1-6. IEEE, (2023)A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications., , , , , , , , , and . IEEE J. Solid State Circuits, 53 (4): 968-982 (2018)Energy-aware loops mapping on multi-vdd CGRAs without performance degradation., , , and . ASP-DAC, page 312-317. IEEE, (2017)GEML: GNN-based efficient mapping method for large loop applications on CGRA., , , , , and . DAC, page 337-342. ACM, (2022)Mixed-granularity parallel coarse-grained reconfigurable architecture., , , , , , , , , and 2 other author(s). DAC, page 343-348. ACM, (2022)A Multiple-Precision Multiply and Accumulation Design with Multiply-Add Merged Strategy for AI Accelerating., , , , and . ASP-DAC, page 229-234. ACM, (2021)