%0 Conference Paper %1 conf/glvlsi/PossaniCRRMJ13 %A Possani, Vinicius Neves %A Callegaro, Vinicius %A Reis, André Inácio %A Ribas, Renato P. %A de Souza Marques, Felipe %A da Rosa Jr., Leomar Soares %B ACM Great Lakes Symposium on VLSI %D 2013 %E Ayala, José Luis %E Jones, Alex K. %E Madden, Patrick H. %E Coskun, Ayse K. %I ACM %K dblp %P 191-196 %T Efficient transistor-level design of CMOS gates. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2013.html#PossaniCRRMJ13 %@ 978-1-4503-2032-0

@inproceedings{conf/glvlsi/PossaniCRRMJ13, added-at = {2018-11-06T00:00:00.000+0100}, author = {Possani, Vinicius Neves and Callegaro, Vinicius and Reis, André Inácio and Ribas, Renato P. and de Souza Marques, Felipe and da Rosa Jr., Leomar Soares}, biburl = {https://www.bibsonomy.org/bibtex/2ba174ea8db1fe8ab9c42fdde0e7e0fc5/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2013}, editor = {Ayala, José Luis and Jones, Alex K. and Madden, Patrick H. and Coskun, Ayse K.}, ee = {https://doi.org/10.1145/2483028.2483089}, interhash = {dab062cd11b0b909c9ae9c6bb9614612}, intrahash = {ba174ea8db1fe8ab9c42fdde0e7e0fc5}, isbn = {978-1-4503-2032-0}, keywords = {dblp}, pages = {191-196}, publisher = {ACM}, timestamp = {2019-07-24T11:38:00.000+0200}, title = {Efficient transistor-level design of CMOS gates.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2013.html#PossaniCRRMJ13}, year = 2013 }