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Topological characteristics of logic networks generated by a graph-based methodology., , , , , и . LASCAS, стр. 343-346. IEEE, (2016)Efficient transistor-level design of CMOS gates., , , , , и . ACM Great Lakes Symposium on VLSI, стр. 191-196. ACM, (2013)Standard Cell and Supergates Designs: An Electrical Comparison on 4-Input Logic Functions., , , и . ISCAS, стр. 1744-1748. IEEE, (2022)The Impact of Logic Gates Susceptibility in Overall Circuit Reliability Analysis., , , , и . ISCAS, стр. 1610-1614. IEEE, (2022)Exploring Independent Gates in FinFET-Based Transistor Network Generation., , , , и . SBCCI, стр. 41:1-41:6. ACM, (2014)Tests and Performance Analysis of Media Processing Implementations for the Middleware of Brazilian Digital TV System Using Different Scenarios., , , , и . MUE, стр. 95-100. IEEE Computer Society, (2011)A new general purpose line probe routing algorithm., , и . ICECS, стр. 658-661. IEEE, (2014)Evaluating Geometric Aspects of Non-Series-Parallel Cells., , и . SBCCI, стр. 16:1-16:6. ACM, (2015)A Straightforward Methodology for QCA Circuits Design., , и . SBCCI, стр. 1-6. IEEE, (2020)SwitchCraft: a framework for transistor network design., , , , , и . SBCCI, стр. 49-53. ACM, (2010)