%0 Journal Article %1 journals/jssc/UpadhyayaPLCRZN19 %A Upadhyaya, Parag %A Poon, Chi Fung %A Lim, Siok-Wei %A Cho, Junho %A Roldan, Arianne %A Zhang, Wenfeng %A Namkoong, Jin %A Pham, Toan %A Xu, Bruce %A Lin, Winson %A Zhang, Hongtao %A Narang, Nakul %A Tan, Kee Hian %A Zhang, Geoff %A Frans, Yohan %A Chang, Ken %D 2019 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 18-28 %T A Fully Adaptive 19-58-Gb/s PAM-4 and 9.5-29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET. %U http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#UpadhyayaPLCRZN19 %V 54

@article{journals/jssc/UpadhyayaPLCRZN19, added-at = {2021-09-30T00:00:00.000+0200}, author = {Upadhyaya, Parag and Poon, Chi Fung and Lim, Siok-Wei and Cho, Junho and Roldan, Arianne and Zhang, Wenfeng and Namkoong, Jin and Pham, Toan and Xu, Bruce and Lin, Winson and Zhang, Hongtao and Narang, Nakul and Tan, Kee Hian and Zhang, Geoff and Frans, Yohan and Chang, Ken}, biburl = {https://www.bibsonomy.org/bibtex/2171e6c8930f38c0f338c5829adc35a06/dblp}, ee = {https://doi.org/10.1109/JSSC.2018.2875091}, interhash = {f4681493866d0ee361625012afb80a70}, intrahash = {171e6c8930f38c0f338c5829adc35a06}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {18-28}, timestamp = {2024-04-08T10:42:02.000+0200}, title = {A Fully Adaptive 19-58-Gb/s PAM-4 and 9.5-29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#UpadhyayaPLCRZN19}, volume = 54, year = 2019 }