Inproceedings,
13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance Reduction.
Y. Seo, J. Choi, S. Cho, H. Han, W. Kim, G. Ryu, J. Ahn, Y. Cho, S. Choi, S. Lee, W. Lee, C. Lee, K. Kim, S. Lee, S. Park, M. Choi, S. Lee, M. Kim, T. Shin, H. Jeong, H. Kim, H. Song, Y. Hong, S. Yoon, G. Park, H. You, C. Choi, H. Jung, J. Cho, and J. Kim.ISSCC, page 246-248. IEEE, (2024)
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- booktitle
- ISSCC
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- 2024
- pages
- 246-248
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- IEEE
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- ee
- https://doi.org/10.1109/ISSCC49657.2024.10454381
- isbn
- 979-8-3503-0620-0
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- http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#SeoCCHKRACCLLLKLPCLKSJKSHYPYCJCK24
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%1 conf/isscc/SeoCCHKRACCLLLKLPCLKSJKSHYPYCJCK24
%A Seo, Yangho
%A Choi, Jihee
%A Cho, Sunki
%A Han, Hyunwook
%A Kim, Wonjong
%A Ryu, Gyeongha
%A Ahn, Jungil
%A Cho, Younga
%A Choi, Sungphil
%A Lee, Seohee
%A Lee, Wooju
%A Lee, Chaehyuk
%A Kim, Kiup
%A Lee, Seongseop
%A Park, Sangbeom
%A Choi, Minjun
%A Lee, Sungwoo
%A Kim, Mino
%A Shin, Taekyun
%A Jeong, Hyeongsoo
%A Kim, Hyunseung
%A Song, Houk
%A Hong, Yunsuk
%A Yoon, Seokju
%A Park, Giwook
%A You, Hokeun
%A Choi, Changkyu
%A Jung, Hae-Kang
%A Cho, Joohwan
%A Kim, Jonghwan
%B ISSCC
%D 2024
%I IEEE
%K dblp
%P 246-248
%T 13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance Reduction.
%U http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#SeoCCHKRACCLLLKLPCLKSJKSHYPYCJCK24
%@ 979-8-3503-0620-0
@inproceedings{conf/isscc/SeoCCHKRACCLLLKLPCLKSJKSHYPYCJCK24,
added-at = {2024-03-19T00:00:00.000+0100},
author = {Seo, Yangho and Choi, Jihee and Cho, Sunki and Han, Hyunwook and Kim, Wonjong and Ryu, Gyeongha and Ahn, Jungil and Cho, Younga and Choi, Sungphil and Lee, Seohee and Lee, Wooju and Lee, Chaehyuk and Kim, Kiup and Lee, Seongseop and Park, Sangbeom and Choi, Minjun and Lee, Sungwoo and Kim, Mino and Shin, Taekyun and Jeong, Hyeongsoo and Kim, Hyunseung and Song, Houk and Hong, Yunsuk and Yoon, Seokju and Park, Giwook and You, Hokeun and Choi, Changkyu and Jung, Hae-Kang and Cho, Joohwan and Kim, Jonghwan},
biburl = {https://www.bibsonomy.org/bibtex/2f9586f0557d811111ab26672fabc5699/dblp},
booktitle = {ISSCC},
crossref = {conf/isscc/2024},
ee = {https://doi.org/10.1109/ISSCC49657.2024.10454381},
interhash = {3b52730a1040aed4b0c0522eb4e3b4a8},
intrahash = {f9586f0557d811111ab26672fabc5699},
isbn = {979-8-3503-0620-0},
keywords = {dblp},
pages = {246-248},
publisher = {IEEE},
timestamp = {2024-04-09T20:43:07.000+0200},
title = {13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance Reduction.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#SeoCCHKRACCLLLKLPCLKSJKSHYPYCJCK24},
year = 2024
}