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Disambiguation of "Park, Chul-Hong"

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Suppression of Edge Effects Based on Analytic Model for Leakage Current Reduction of Sub-40 nm DRAM Device.

, , , , , , and . IEICE Trans. Electron., 93-C (5): 658-661 (2010)

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Sang-Chul Park

Kyung-Chul Park

Soo-Chul Park

Myung-Chul Park

Chul-Min Park

 

Other publications of authors with the same name

Suppression of Edge Effects Based on Analytic Model for Leakage Current Reduction of Sub-40 nm DRAM Device., , , , , , and . IEICE Trans. Electron., 93-C (5): 658-661 (2010)Exploration of VLSI CAD researches for early design rule evaluation., , and . ASP-DAC, page 405-406. IEEE, (2011)Layout Decomposition Approaches for Double Patterning Lithography., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (6): 939-952 (2010)Dose map and placement co-optimization for timing yield enhancement and leakage power reduction., , , and . DAC, page 516-521. ACM, (2008)An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC., , , , , , , and . ISQED, page 81-86. IEEE Computer Society, (2000)Layout decomposition for double patterning lithography., , , and . ICCAD, page 465-472. IEEE Computer Society, (2008)Detailed Placement for Enhanced Control of Resist and Etch CDs., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (12): 2144-2157 (2007)Interface test of local control center simulator for validation of improved train control system using on-board control., , and . ICTC, page 577-578. IEEE, (2014)Detailed placement for improved depth of focus and CD control., , and . ASP-DAC, page 343-348. ACM Press, (2005)