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pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process.

I. Choi, S. Hong, K. Kim, J. Hwang, S. Woo, Y. Kim, C. Cho, E. Lee, H. Lee, M. Jung, H. Jung, J. Hwang, J. Yoon, W. Lim, H. Yoo, W. Lee, J. Oh, D. Lee, J. Lee, J. Kim, Y. Kim, S. Park, B. Ho, B. Na, H. Choi, C. Lee, S. Lee, H. Shin, Y. Lee, J. Ryu, S. Shin, S. Park, D. Lim, S. Bae, Y. Sohn, T. Oh, and S. Hwang. ISSCC, page 234-236. IEEE, (2024)

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Young Kim

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A 40-to-800MHz Locking Multi-Phase DLL.Y. Kim, S. Park, Y. Kim, D. Jang, S. Jeong, H. Park, and J. Sim. ISSCC, page 306-605. IEEE, (2007)Corporate governance, shareholder rights and firm diversification: An empirical analysisP. Jiraporn, Y. Kim, W. Davidson, and M. Singh. Journal of Banking & Finance, 30 (3): 947--963 (March 2006)Adaptive Cooperative Transmission with Spatial Phase Coding for Interference Mitigation in the Wireless Cellular Communication.S. Kim, Y. Kim, and H. Song. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (1): 317-321 (2017)Cardiac-induced cerebral pulsatility, brain structure, and cognition in middle and older-aged adults.T. Kim, S. Kim, V. Agarwal, A. Cohen, R. Roush, Y. Chang, Y. Cheng, B. Snitz, T. Huppert, A. Bagic and 3 other author(s). NeuroImage, (2021)13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process.I. Choi, S. Hong, K. Kim, J. Hwang, S. Woo, Y. Kim, C. Cho, E. Lee, H. Lee, M. Jung and 27 other author(s). ISSCC, page 234-236. IEEE, (2024)A Candidate Generation System Using Probability Matrix in Computer Go.Y. Kim, and K. Yoo. IC-AI, page 623-628. CSREA Press, (1999)A 110 MHz to 1.4 GHz Locking 40-Phase All-Digital DLL.Y. Kim, S. Lee, H. Park, and J. Sim. IEEE J. Solid State Circuits, 46 (2): 435-444 (2011)Relay Selection Scheme for Improved Performance in the Wireless Communication Systems Based on OFDM.S. Kim, W. Kim, and H. Song. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (10): 2200-2203 (2017)A rapid QAR data acquisition and visualization system for aircraft engine maintenances.J. Kim, S. Lee, S. Kim, J. Park, and Y. Kim. iiWAS, page 669-673. ACM, (2009)Cgroup-aware load balancing in heterogeneous multi-processor scheduler.S. Kim, S. Kim, R. Kil, and H. Youn. ICTC, page 21-26. IEEE, (2016)

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13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process.

Please choose a person to relate this publication to

Young Kim

Young Kim

Young Kim

Young Kim

Young Kim

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kim, Young-Sang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process.

Please choose a person to relate this publication to

Young Kim

Young Kim

Young Kim

Young Kim

Young Kim

Other publications of authors with the same name

Disambiguation

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community post
history of this post
URL
DOI
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Chicago
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13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process.