Author of the publication

A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips.

, , , , , , , , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (2): 740-753 (February 2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 91.2dB SNDR 66.2fJ/conv. dynamic amplifier based 24kHz ΔΣ modulator., , , and . A-SSCC, page 317-320. IEEE, (2016)A Provisional Labels-Reduced, Real-Time Connected Component Labeling Algorithm for Edge Hardware., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2997-3001 (2022)A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips., , , , , , , , , and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 71 (2): 740-753 (February 2024)A 128×128 15µm-Pitch DROIC with Pixel-Level 14-Bit ADC., , , , , , , , and . ICTA, page 1-2. IEEE, (2023)ViP: A Hierarchical Parallel Vision Processor for Hybrid Vision Chip., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2957-2961 (2022)SiamMixer: A Lightweight and Hardware-Friendly Visual Object-Tracking Network., , , , , , and . Sensors, 22 (4): 1585 (2022)A High-Speed Parallel FPGA Implementation of Harris Corner Detection., , , , , , and . ICTA, page 71-72. IEEE, (2020)A Lightweight Integer-STBP On-Chip Learning Method of Spiking Neural Networks For Edge Processors., , , , , , and . ICTA, page 1-2. IEEE, (2023)A Compact High-Quality Image Demosaicking Neural Network for Edge-Computing Devices., , , , , and . Sensors, 21 (9): 3265 (2021)A 32×32 Array Terahertz Sensor in 65-nm CMOS Technology., , , , , , , , , and . ICTA, page 259-260. IEEE, (2021)