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Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (2): 280-285 (2014)

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NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures., , , , , , , , , and . IRPS, page 2. IEEE, (2015)ESD protection diodes in optical interposer technology., , , , , , and . ICICDT, page 1-4. IEEE, (2015)Physics-based device aging modelling framework for accurate circuit reliability assessment., , , , , , , , , and . IRPS, page 1-6. IEEE, (2021)Understanding the memory window in 1T-FeFET memories: a depolarization field perspective., , , , , , , and . IMW, page 1-4. IEEE, (2021)Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology., , , , , , , , , and . ISQED, page 473-479. IEEE, (2014)The Influence of Gate Bias on the Anneal of Hot-Carrier Degradation., , , , , and . IRPS, page 1-7. IEEE, (2020)Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps., , , , , , and . IRPS, page 5. IEEE, (2018)A new degradation model and lifetime extrapolation technique for lightly doped drain nMOSFETs under hot-carrier degradation., , , , , , and . Microelectron. Reliab., 41 (3): 437-443 (2001)RF ESD protection strategies - the design and performance trade-off challenges., , , , , , , , , and 5 other author(s). CICC, page 489-496. IEEE, (2005)The defect-centric perspective of device and circuit reliability - From individual defects to circuits., , , , , , , , , and 5 other author(s). ESSDERC, page 218-225. IEEE, (2015)