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Disambiguation of "Talegaonkar, Mrunmay"

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A 0.7V time-based inductor for fully integrated low bandwidth filter applications.

, , , , , , and . CICC, page 1-4. IEEE, (2017)

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A 2.5GHz 2.2mW/25µW on/off-state power 2psrms-long-term-jitter digital clock multiplier with 3-reference-cycles power-on time., , , , and . ISSCC, page 256-257. IEEE, (2013)A 5 Gb/s, 10 ns Power-On-Time, 36 µW Off-State Power, Fast Power-On Transmitter for Energy Proportional Links., , , , and . IEEE J. Solid State Circuits, 49 (10): 2243-2258 (2014)3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS., , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 10-25MHz, 600mA buck converter using time-based PID compensator with 2µA/MHz quiescent current, 94% peak efficiency, and 1MHz BW., , , , , , , , and . VLSIC, page 1-2. IEEE, (2014)A 0.55V 61dB-SNR 67dB-SFDR 7MHz 4th-order Butterworth filter using ring-oscillator-based integrators in 90nm CMOS., , and . ISSCC, page 360-362. IEEE, (2012)A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer., , , , , , and . ISSCC, page 152-154. IEEE, (2012)10.7 A 6.75-to-8.25GHz 2.25mW 190fsrms integrated-jitter PVT-insensitive injection-locked clock multiplier using all-digital continuous frequency-tracking loop in 65nm CMOS., , , and . ISSCC, page 1-3. IEEE, (2015)Analog Filter Design Using Ring Oscillator Integrators., , and . IEEE J. Solid State Circuits, 47 (12): 3120-3129 (2012)A 5GHz Digital Fractional-N PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS., , , , , , , , and . IEEE J. Solid State Circuits, 52 (9): 2306-2320 (2017)High Frequency Buck Converter Design Using Time-Based Control Techniques., , , , , , , , and . IEEE J. Solid State Circuits, 50 (4): 990-1001 (2015)