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Address Order Violation Detection with Parallel Counting Bloom Filters., , , and . IEICE Trans. Electron., 98-C (7): 580-593 (2015)Improvement of message communication in concurrent logic language., , , , , and . PASCO, page 156-164. ACM, (1997)Low-Overhead Architecture for Security Tag., , , , and . PRDC, page 135-142. IEEE Computer Society, (2009)String-Wise Information Flow Tracking against Script Injection Attacks., , , and . PRDC, page 169-176. IEEE Computer Society, (2009)Base Address Recognition with Data Flow Tracking for Injection Attack Detection., , , , , , and . PRDC, page 165-172. IEEE Computer Society, (2006)A proposal of self-cleanup cache., , , and . PACT, page 298-301. IFIP Working Group on Algol / ACM, (1995)Bank-Aware Instruction Scheduler for a Multibanked Register File., , , , and . J. Inf. Process., (2018)A high-speed dynamic instruction scheduling scheme for superscalar processors., , , , , and . MICRO, page 225-236. ACM/IEEE Computer Society, (2001)A cloud architecture for protecting guest's information from malicious operators with memory management., , , , and . CODASPY, page 155-158. ACM, (2014)SEVA: A Soft-Error- and Variation-Aware Cache Architecture., , and . PRDC, page 47-54. IEEE Computer Society, (2006)