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An 8Kb 40-nm 2T2MTJ STT-MRAM Design with 2.6ns Access Time and Time-Adjustable Writing Process., , , , , , , , и . ASICON, стр. 1-4. IEEE, (2021)Four point probe ramped voltage stress as an efficient method to understand breakdown of STT-MRAM MgO tunnel junctions., , , , , , , , и . IRPS, стр. 4. IEEE, (2015)Exploring the use of volatile STT-RAM for energy efficient video processing., , , , и . ISQED, стр. 81-87. IEEE, (2016)Design techniques to improve the device write margin for MRAM-based cache memory., , , , и . ACM Great Lakes Symposium on VLSI, стр. 97-102. ACM, (2011)Hardware implementation of KLMS algorithm using FPGA., , , , и . IJCNN, стр. 2276-2281. IEEE, (2014)A fast low-light multi-image fusion with online image restoration., , , и . ICCE, стр. 346-347. IEEE, (2013)Stereo panoramic image stitching with a single camera., , , , и . ICCE, стр. 256-257. IEEE, (2013)A low-area digitalized channel selection filter for DSRC system., , и . VLSI-DAT, стр. 1-4. IEEE, (2014)A parallel camera image signal processor for SIMD architecture., , , и . EURASIP J. Image Video Process., (2016)A ghost-free pseudo-multiframe HDR., , , , , и . ICCE, стр. 260-261. IEEE, (2014)