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Disambiguation of "Valls, Javier"

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Design of an efficient digital down-converter for a SDR-based DVB-S receiver.

, , , , and . ECCTD, page 256-259. IEEE, (2007)

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Javier Valls

Alvaro Valls

Alvaro Valls

Javier Manero

Javier Jáurequi

 

Other publications of authors with the same name

50 Years of CORDIC: Algorithms, Architectures, and Applications., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (9): 1893-1907 (2009)A common FPGA based synchronizer architecture for Hiperlan/2 and IEEE 802.11a WLAN systems., , , , and . PIMRC, page 531-535. IEEE, (2004)Power analysis and estimation tool integrated with XPOWER., , , and . FPGA, page 259. ACM, (2004)Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain., , and . Int. J. Reconfigurable Comput., (2014)FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices., , , , , and . IEEE Trans. Educ., 50 (3): 229-235 (2007)Soft-decision LCC Decoder Architecture with n=4 for RS(255, 239)., , , and . NEWCAS, page 305-308. IEEE, (2018)A symbol flipping decoder for NB-LDPC relying on multiple votes., , and . ISTC, page 203-207. IEEE, (2014)Reduction of Complexity for Nonbinary LDPC Decoders With Compressed Messages., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2676-2679 (2015)A 630 Mbps non-binary LDPC decoder for FPGA., , , , and . ISCAS, page 1989-1992. IEEE, (2015)Design of high performance timing recovery loops for communication applications., , , and . SiPS, page 1-4. IEEE, (2006)