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Instruction driven cross-layer CNN accelerator with winograd transformation on FPGA., , , , , , and . FPT, page 227-230. IEEE, (2017)Improved Multiuser Detection for Fast FH/MFSK Systems., , , and . ICWN, page 130-136. CSREA Press, (2005)ASP-SIFT: Using Analog Signal Processing Architecture to Accelerate Keypoint Detection of SIFT Algorithm., , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 198-211 (2020)Bi-stream Region Ensemble Network: Promoting Accuracy in Fingertip Localization from Stereo Images., , , and . BMVC, page 314. BMVA Press, (2018)A General Logic Synthesis Framework for Memristor-based Logic Design., , , , , , , and . ICCAD, page 1-8. ACM, (2019)A Single-Magnetic Bidirectional Integrated Equalizer Using Multi-Winding Transformer and Voltage Multiplier for Hybrid Energy Storage System., , , , , , , and . IEEE Trans. Veh. Technol., 72 (6): 7318-7327 (June 2023)Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate., , and . APCCAS, page 964-967. IEEE, (2006)Efficient region-aware P/G TSV planning for 3D ICs., , , , , and . ISQED, page 171-178. IEEE, (2014)Large scale recurrent neural network on GPU., , , , , , , and . IJCNN, page 4062-4069. IEEE, (2014)Register allocation for hybrid register architecture in nonvolatile processors., , , , , and . ISCAS, page 1050-1053. IEEE, (2014)