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Low power magnetic flip-flop based on checkpointing and self-enable mechanism.

, , , , and . NEWCAS, page 1-4. IEEE, (2013)

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Design of embedded MRAM macros for memory-in-logic applications., , , , and . ACM Great Lakes Symposium on VLSI, page 155-158. ACM, (2010)High Performance SoC Design Using Magnetic Logic and Memory., , , , , , , , , and 2 other author(s). VLSI-SoC (Selected Papers), volume 379 of IFIP Advances in Information and Communication Technology, page 10-33. Springer, (2011)Nanodevice-based novel computing paradigms and the neuromorphic approach., , , , and . ISCAS, page 2509-2512. IEEE, (2012)Synthesis of Finite State Machines with Magnetic Domain Wall Logic., , , , , , and . ISCAS, page 133-136. IEEE, (2007)Spin-electronics based logic fabrics., , , , , , , and . VLSI-SoC, page 174-179. IEEE, (2013)Injection locked CMOS buffer dedicated to nanomagnetic based voltage controlled oscillator., , , , and . ICECS, page 190-193. IEEE, (2008)Embedded MRAM for high-speed computing., , , , , , , , , and 2 other author(s). VLSI-SoC, page 37-42. IEEE, (2011)Synchronous full-adder based on complementary resistive switching memory cells., , , , , , , , , and 3 other author(s). NEWCAS, page 1-4. IEEE, (2013)Spintronics: Emerging Ultra-Low-Power Circuits and Systems beyond MOS Technology., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 12 (2): 16:1-16:42 (2015)Design considerations and strategies for high-reliable STT-MRAM., , , , , and . Microelectron. Reliab., 51 (9-11): 1454-1458 (2011)