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Disambiguation of "Cai, Yici"

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Stairway compaction using corner block list and its applications with rectilinear blocks.

, , , , , and . ACM Trans. Design Autom. Electr. Syst., 9 (2): 199-211 (2004)

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Jian Cai

Yongjie Cai

Cai Berg

Xuediao Cai

Dengke Cai

 

Other publications of authors with the same name

SIAR: splitting-graph-based interactive analog router., , , and . ACM Great Lakes Symposium on VLSI, page 367-370. ACM, (2011)SVM-Based Routability-Driven Chip-Level Design for Voltage-Aware Pin-Constrained EWOD Chips., , , , and . ISPD, page 49-56. ACM, (2015)A thermal-driven force-directed floorplanning algorithm for 3D ICs., , , and . CAD/Graphics, page 497-502. IEEE, (2009)Power driven placement with layout aware supply voltage assignment for voltage island generation in Dual-Vdd designs., , , and . ASP-DAC, page 582-587. IEEE, (2006)Efficient model reduction of interconnects via double gramians approximation., , , and . ASP-DAC, page 25-30. IEEE, (2010)McPAT-Calib: A Microarchitecture Power Modeling Framework for Modern CPUs., , , , , and . ICCAD, page 1-9. IEEE, (2021)Physical aware clock skew rescheduling., , and . ACM Great Lakes Symposium on VLSI, page 473-476. ACM, (2007)Improved multilevel routing with redundant via placement for yield and reliability., , , and . ACM Great Lakes Symposium on VLSI, page 143-146. ACM, (2005)A Power Grids Electromigration Analysis with Via Array Using Current-Tracing Model., , and . ISCAS, page 1-5. IEEE, (2021)Leakage power optimization for clock network using dual-Vth technology., , and . ISCAS, page 2769-2772. IEEE, (2008)