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Stairway compaction using corner block list and its applications with rectilinear blocks.

, , , , , and . ACM Trans. Design Autom. Electr. Syst., 9 (2): 199-211 (2004)

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Through-Silicon-Via assignment for 3D ICs., , , and . ASICON, page 353-356. IEEE, (2011)Post-floorplanning power optimization for MSV-driven application specific NoC design., and . ISCAS, page 994-997. IEEE, (2014)Application-specific Network-on-Chip synthesis: Cluster generation and network component insertion., , , , , and . ISQED, page 144-149. IEEE, (2011)Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips., , , , and . ISCAS, page 1-4. IEEE, (2018)Network flow-based simultaneous retiming and slack budgeting for low power design., , , , , , and . ASP-DAC, page 473-478. IEEE, (2011)Corner block list representation and its application to floorplan optimization., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 51-II (5): 228-233 (2004)Floorplanning with abutment constraints based on corner block list., , , , , and . Integr., 31 (1): 65-77 (2001)Stairway compaction using corner block list and its applications with rectilinear blocks., , , , , and . ACM Trans. Design Autom. Electr. Syst., 9 (2): 199-211 (2004)Integrated interlayer via planning and pin assignment for 3D ICs., , , and . SLIP, page 99-104. ACM, (2009)Stochastic Local Search Using the Search Space Smoothing Meta-Heuristic: A Case Study., , , , and . JCIS, Atlantis Press, (2006)