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A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits.

, , , and . ISCAS, page 1254-1257. IEEE, (2016)

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HTM Spatial Pooler With Memristor Crossbar Circuits for Sparse Biometric Recognition., , , and . IEEE Trans. Biomed. Circuits Syst., 11 (3): 640-651 (2017)Pruning for Improved ADC Efficiency in Crossbar-based Analog In-memory Accelerators., , , and . CoRR, (2024)On Inherent Adversarial Robustness of Active Vision Systems., , and . CoRR, (2024)A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits., , , and . ISCAS, page 1254-1257. IEEE, (2016)Towards Two-Stream Foveation-based Active Vision Learning., , , and . CoRR, (2024)Exploring Foveation and Saccade for Improved Weakly-Supervised Localization., , , and . Gaze Meets ML, volume 226 of Proceedings of Machine Learning Research, page 61-89. PMLR, (2023)On-chip Face Recognition System Design with Memristive Hierarchical Temporal Memory., , , , and . CoRR, (2017)Design and implication of a rule based weight sparsity module in HTM spatial pooler., , and . ICECS, page 274-277. IEEE, (2017)Memristive Operational Amplifiers., , , and . BICA, volume 41 of Procedia Computer Science, page 114-119. Elsevier, (2014)Toward Two-Stream Foveation-Based Active Vision Learning., , , and . IEEE Trans. Cogn. Dev. Syst., 16 (5): 1843-1860 (October 2024)