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In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter., , , , , , и . ISSCC, стр. 188-189. IEEE, (2010)Deep Convolutional Neural Network Accelerator Featuring Conditional Computing and Low External Memory Access., и . CICC, стр. 1-4. IEEE, (2020)An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays., , , и . DATE, стр. 1019-1024. IEEE, (2020)A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC., , , , , , и . IEEE J. Solid State Circuits, 44 (10): 2755-2765 (2009)An Energy-Efficient Deep Convolutional Neural Network Accelerator Featuring Conditional Computing and Low External Memory Access., и . IEEE J. Solid State Circuits, 56 (3): 803-813 (2021)FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro., , , , , и . ESSCIRC, стр. 405-408. IEEE, (2023)A 28nm 8-bit Floating-Point Tensor Core based CNN Training Processor with Dynamic Activation/Weight Sparsification., , , , , , , , и . ESSCIRC, стр. 89-92. IEEE, (2022)Big-Little Chiplets for In-Memory Acceleration of DNNs: A Scalable Heterogeneous Architecture., , , , , , , и . ICCAD, стр. 8:1-8:9. ACM, (2022)XNOR-SRAM: In-Bitcell Computing SRAM Macro based on Resistive Computing Mechanism., , , и . ACM Great Lakes Symposium on VLSI, стр. 417-422. ACM, (2019)Low Power and Trusted Machine Learning., , , , и . ACM Great Lakes Symposium on VLSI, стр. 515. ACM, (2018)