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Embedded deterministic test points for compact cell-aware tests., , , , , , , , , and . ITC, page 1-8. IEEE, (2015)On New Class of Test Points and Their Applications., , and . ITC, page 1-9. IEEE, (2018)On Test Points Enhancing Hardware Security., , , , and . ATS, page 61-66. IEEE Computer Society, (2016)Full-scan LBIST with capture-per-cycle hybrid test points., , , , , and . ITC, page 1-9. IEEE, (2017)On New Test Points for Compact Cell-Aware Tests., , , , , , , , , and . IEEE Des. Test, 33 (6): 7-14 (2016)Quality assurance in memory built-in self-test tools., , , , , and . DDECS, page 39-44. IEEE Computer Society, (2014)Prediction of Test Pattern Count and Test Data Volume for Scan Architectures under Different Input Channel Configurations., , , , , , , , , and 1 other author(s). ITC, page 1-10. IEEE, (2020)Test point insertion in hybrid test compression/LBIST architectures., , , , and . ITC, page 1-10. IEEE, (2016)Design for low test pattern counts., , , , , , and . DAC, page 136:1-136:6. ACM, (2015)Test Challenges of Intel IA Cores., , , , and . ITC, page 1-5. IEEE, (2020)