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POPA: Expressing High and Portable Performance across Spatial and Vector Architectures for Tensor Computations.

, , , , , and . FPGA, page 199-210. ACM, (2024)

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Just-In-Time Software Pipelining., , , and . CGO, page 11. ACM, (2014)Embedding a DSL in SYCL for Productive and Performant Tensor Computing on Heterogeneous Devices., and . IWOCL, page 30:1. ACM, (2022)Multi-dimensional Kernel Generation for Loop Nest Software Pipelining., , and . Euro-Par, volume 4128 of Lecture Notes in Computer Science, page 311-322. Springer, (2006)Leveraging Hardware Probes and Optimizations for Accelerating Fuzz Testing of Heterogeneous Applications., , , , and . ESEC/SIGSOFT FSE, page 1101-1113. ACM, (2023)POPA: Expressing High and Portable Performance across Spatial and Vector Architectures for Tensor Computations., , , , , and . FPGA, page 199-210. ACM, (2024)Register allocation for software pipelined multi-dimensional loops., , and . PLDI, page 154-167. ACM, (2005)Expressing Sparse Matrix Computations for Productive Performance on Spatial Architectures.. CoRR, (2018)ProductiveC: enabling high productivity in C-family languages.. Conf. Computing Frontiers, page 34:1-34:2. ACM, (2015)Mapping Stencils on Coarse-grained Reconfigurable Spatial Architecture., , , , and . CoRR, (2020)Sparso: Context-driven Optimizations of Sparse Linear Algebra., , , , and . PACT, page 247-259. ACM, (2016)