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Mapping Stencils on Coarse-grained Reconfigurable Spatial Architecture.

, , , , и . CoRR, (2020)

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Hongbo Xu

Hongbo Zhao

Hongbo Gong

Hongbo Zhu

Hongbo Jia

 

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Expressing Sparse Matrix Computations for Productive Performance on Spatial Architectures.. CoRR, (2018)Register allocation for software pipelined multi-dimensional loops., , и . PLDI, стр. 154-167. ACM, (2005)Tensaurus: A Versatile Accelerator for Mixed Sparse-Dense Tensor Computations., , , , , и . HPCA, стр. 689-702. IEEE, (2020)SMARQ: Software-Managed Alias Register Queue for Dynamic Optimizations., , , и . MICRO, стр. 425-436. IEEE Computer Society, (2012)Lasa: Abstraction and Specialization for Productive and Performant Linear Algebra on FPGAs., , , , , , , , , и . FCCM, стр. 34-40. IEEE, (2023)Just-In-Time Software Pipelining., , , и . CGO, стр. 11. ACM, (2014)Multi-dimensional Kernel Generation for Loop Nest Software Pipelining., , и . Euro-Par, том 4128 из Lecture Notes in Computer Science, стр. 311-322. Springer, (2006)POPA: Expressing High and Portable Performance across Spatial and Vector Architectures for Tensor Computations., , , , , и . FPGA, стр. 199-210. ACM, (2024)Embedding a DSL in SYCL for Productive and Performant Tensor Computing on Heterogeneous Devices., и . IWOCL, стр. 30:1. ACM, (2022)Leveraging Hardware Probes and Optimizations for Accelerating Fuzz Testing of Heterogeneous Applications., , , , и . ESEC/SIGSOFT FSE, стр. 1101-1113. ACM, (2023)