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Disambiguation of "Chandra, Vikas"

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ScaleNAS: Multi-Path One-Shot NAS for Scale-Aware High-Resolution Representation.

, , , , , , , and . AutoML, volume 188 of Proceedings of Machine Learning Research, page 15/1-18. PMLR, (2022)

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Vikas Kumar

Vikas Madan

Vikas Mehrotra

Vikas Ramachandra

Vikas Sharma

 

Other publications of authors with the same name

Leveraging sensitivity analysis for fast, accurate estimation of SRAM dynamic write VMIN., , , and . DATE, page 1819-1824. EDA Consortium San Jose, CA, USA / ACM DL, (2013)TIMBER: Time borrowing and error relaying for online timing error resilience., , , and . DATE, page 1554-1559. IEEE Computer Society, (2010)Analytical model for TDDB-based performance degradation in combinational logic., , , and . DATE, page 423-428. IEEE Computer Society, (2010)A black box method for stability analysis of arbitrary SRAM cell structures., , , , , , and . DATE, page 795-800. IEEE Computer Society, (2010)Impact of voltage scaling on nanoscale SRAM reliability., and . DATE, page 387-392. IEEE, (2009)Heterogeneous Dataflow Accelerators for Multi-DNN Workloads., , , , , and . HPCA, page 71-83. IEEE, (2021)KeepAugment: A Simple Information-Preserving Data Augmentation Approach., , , , and . CVPR, page 1055-1064. Computer Vision Foundation / IEEE, (2021)CPT: Efficient Deep Neural Network Training via Cyclic Precision., , , , , , and . ICLR, OpenReview.net, (2021)Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks., , , , , , , , and . DAC, page 1-6. IEEE, (2020)Modeling SRAM dynamic VMIN., , , and . ICICDT, page 1-4. IEEE, (2014)