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Disambiguation of "Daneshtalab, Masoud"

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DenseDisp: Resource-Aware Disparity Map Estimation by Compressing Siamese Neural Architecture.

, , , , , , , and . CEC, page 1-8. IEEE, (2020)

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Masoud Ansari

Masoud Rafizadeh

Masoud Khiabanchian

Masoud Jannat

Masoud Garshasbi

 

Other publications of authors with the same name

Editorial: Special issue on design challenges for many-core processors., , and . ACM Trans. Embed. Comput. Syst., 13 (3s): 100:1-100:2 (2014)An exploration of heterogeneous systems., , , and . ReCoSoC, page 1-7. IEEE, (2013)Automated Power and Latency Management in Heterogeneous 3D NoCs., , , and . NoCArc@MICRO, page 33-38. ACM, (2015)Optimizing scheduling for heterogeneous computing systems using combinatorial meta-heuristic solution., , , and . SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI, page 1-8. IEEE, (2017)AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators., , , , , , , , and . CoRR, (2024)A comprehensive systematic review of integration of time sensitive networking and 5G communication., , , , , and . J. Syst. Archit., (2023)DeepVigor: VulnerabIlity Value RanGes and FactORs for DNNs' Reliability Assessment., , , , and . ETS, page 1-6. IEEE, (2023)APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors., , , , and . DDECS, page 124-127. IEEE, (2023)Design Challenges in Hardware Development of Time-Sensitive Networking: A Research Plan., , , , , and . CPS Summer School, PhD Workshop, volume 2457 of CEUR Workshop Proceedings, page 29-38. CEUR-WS.org, (2019)On-Chip Verification of NoCs Using Assertion Processors., , , , and . DSD, page 535-538. IEEE Computer Society, (2007)