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PASCAL: Timing SCA Resistant Design and Verification Flow., , , and . IOLTS, page 239-242. IEEE, (2019)BASTION: Board and SoC test instrumentation for ageing and no failure found., , , , , , , , and . DATE, page 115-120. IEEE, (2017)Diagnostic Test Generation for Statistical Bug Localization Using Evolutionary Computation., , , , , , and . EvoApplications, volume 8602 of Lecture Notes in Computer Science, page 425-436. Springer, (2014)Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors., , , and . DSD, page 646-650. IEEE, (2020)Fast identification of true critical paths in sequential circuits., , , , and . Microelectron. Reliab., (2018)Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules., , , and . DSD, page 557-561. IEEE, (2021)Timing-critical path analysis with structurally synthesized BDDs., , , , , and . MECO, page 1-6. IEEE, (2018)On BTI Aging Rejuvenation in Memory Address Decoders., , , , , and . LATS, page 1-6. IEEE, (2022)Hierarchical identification of NBTI-critical gates in nanoscale logic., , , , , , and . LATW, page 1-6. IEEE, (2014)Gate-level modelling of NBTI-induced delays under process variations., , , , , , , and . LATS, page 75-80. IEEE, (2016)