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NORB: A Stream-Based and Non-Blocking FPGA Accelerator for ORB Feature Extraction.

, , , , and . ICECS, page 1-4. IEEE, (2023)

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Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects., , , , and . PDPTA, CSREA Press, (2000)Power-aware FPGA technology mapping for programmable-VT architectures (abstract only)., and . FPGA, page 268. ACM, (2012)An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model., and . ASP-DAC, page 886-891. IEEE, (2006)Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools., , , and . FPL, page 279-284. IEEE, (2007)ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning., , and . FPL, page 1-11. IEEE, (2016)Optimization of FPGA Routing Networks with Time-Multiplexed Interconnects., , and . LASCAS, page 1-4. IEEE, (2020)Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (9): 2156-2169 (2019)HRFF: Hierarchical and Recursive Floorplanning Framework for NoC-Based Scalable Multidie FPGAs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (11): 4295-4308 (November 2023)Cryogenic quasi-static embedded DRAM for energy-efficient compute-in-memory applications., , , , , , , , , and 2 other author(s). CoRR, (2023)Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip., , , , and . ESTIMedia, page 33-38. IEEE Computer Society, (2006)