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An 8b 0.8kS/s configurable VCO-based ADC using oxide TFTs with Inkjet printing interconnection., , , , , , , and . ISCAS, page 1-4. IEEE, (2017)Mini-step Strategy for Transient Analysis, and . CoRR, (2011)Deadline-aware task scheduling for solar-powered nonvolatile sensor nodes with global energy migration., , , , , , and . DAC, page 126:1-126:6. ACM, (2015)Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture., , , , , , and . DAC, page 80:1-80:6. ACM, (2017)Design of multi-stage latency adders using detection and sequence-dependence between successive calculations., , , , and . ISCAS, page 998-1001. IEEE, (2014)Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOS., , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 486-495. Springer, (2006)A General Logic Synthesis Framework for Memristor-based Logic Design., , , , , , , and . ICCAD, page 1-8. ACM, (2019)ASP-SIFT: Using Analog Signal Processing Architecture to Accelerate Keypoint Detection of SIFT Algorithm., , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 198-211 (2020)A Single-Magnetic Bidirectional Integrated Equalizer Using Multi-Winding Transformer and Voltage Multiplier for Hybrid Energy Storage System., , , , , , , and . IEEE Trans. Veh. Technol., 72 (6): 7318-7327 (June 2023)Mixup Asymmetric Tri-Training for Heartbeat Classification Under Domain Shift., , , , and . IEEE Signal Process. Lett., (2021)