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Enhancing Hardware Security with Emerging Transistor Technologies., , , , , and . ACM Great Lakes Symposium on VLSI, page 305-310. ACM, (2016)Cross-Lock: Dense Layout-Level Interconnect Locking using Cross-bar Architectures., , , and . ACM Great Lakes Symposium on VLSI, page 147-152. ACM, (2018)Cyclic Obfuscation for Creating SAT-Unresolvable Circuits., , , , , and . ACM Great Lakes Symposium on VLSI, page 173-178. ACM, (2017)On the Impossibility of Approximation-Resilient Circuit Locking., , and . HOST, page 161-170. IEEE, (2019)A Security Analysis of Circuit Clock Obfuscation., , , and . Cryptogr., 6 (3): 43 (2022)Emerging Technology-Based Design of Primitives for Hardware Security., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 13 (1): 3:1-3:19 (2016)Enhancing Solver-based Generic Side-Channel Analysis with Machine Learning., and . ACM Great Lakes Symposium on VLSI, page 345-350. ACM, (2023)IcySAT: Improved SAT-based Attacks on Cyclic Locked Circuits., , and . ICCAD, page 1-7. ACM, (2019)Hardware Security Challenges Beyond CMOS: Attacks and Remedies., , and . ISVLSI, page 200-205. IEEE Computer Society, (2016)Provably secure camouflaging strategy for IC protection., , , , , , and . ICCAD, page 28. ACM, (2016)