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Decomposing specifications with concurrent outputs to resolve state coding conflicts in asynchronous logic synthesis., и . DAC, стр. 830-833. ACM, (2004)CMOS design of the tree arbiter element., и . IEEE Trans. Very Large Scale Integr. Syst., 4 (4): 472-476 (1996)User-Controlled, Auditable, Cross-Jurisdiction Sharing of Healthcare Data Mediated by a Public Blockchain., , , и . TrustCom, стр. 87-96. IEEE, (2020)A Theory of Synchrony and Asynchrony., , и . Programming Concepts and Methods, стр. 459-478. North-Holland, (1990)Delay-Insensitive Interface Specification and Synthesis., и . DATE, стр. 169-173. IEEE Computer Society / ACM, (2000)Sequencer circuits for VLSI programming., и . ASYNC, стр. 82-90. IEEE Computer Society, (1995)Gate-level modelling and verification of asynchronous circuits using CSPM and FDR.. ASYNC, стр. 83-94. IEEE Computer Society, (2007)Optimal Two-Level Delay - Insensitive Implementation of Logic Functions., и . PATMOS, том 2451 из Lecture Notes in Computer Science, стр. 92-100. Springer, (2002)Models for Data-Flow Sequential Processes.. 25 Years Communicating Sequential Processes, том 3525 из Lecture Notes in Computer Science, стр. 85-97. Springer, (2004)Formal design of an asynchronous DSP counterflow pipeline: a case study in handshake algebra., , , и . ASYNC, стр. 206-215. IEEE, (1994)