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Automated Design for Testability of Semicustom Integrated Circuits.

, , , and . ITC, page 558-564. IEEE Computer Society, (1985)

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The design of two easily-testable VLSI array multipliers., and . IEEE Symposium on Computer Arithmetic, page 2-9. IEEE Computer Society, (1983)Systematic Characterization of Physical Defects for Fault Analysis of MOS IC Cells., , and . ITC, page 390-399. IEEE Computer Society, (1984)Techniques for Software Thread Integration in Real-Time Embedded Systems., and . RTSS, page 322-333. IEEE Computer Society, (1998)The Block-Based Trace Cache., , and . ISCA, page 196-207. IEEE Computer Society, (1999)Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures., and . FTCS, page 100-109. IEEE Computer Society, (1995)Hardware to Software Migration with Real-Time Thread Integration., and . EUROMICRO, page 10243-. IEEE Computer Society, (1998)A framework for modeling and optimization of prescient instruction prefetch., , , , , , and . SIGMETRICS, page 13-24. ACM, (2003)Architecture Synthesis of High-Performance Application-Specific Processors., and . DAC, page 542-548. IEEE Computer Society Press, (1990)Value Locality and Load Value Prediction., , and . ASPLOS, page 138-147. ACM Press, (1996)The Intrinsic Bandwidth Requirements of Ordinary Programs., and . ASPLOS, page 105-114. ACM Press, (1996)