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The Parallel-Test-Detect Fault Simulation Algorithm.

, and . ITC, page 712-717. IEEE Computer Society, (1989)

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Flying probe test systems: capabilities for effective testing.. ITC, page 1163. IEEE Computer Society, (1998)An improved layout verification algorithm (LAVA)., and . EURO-DAC, page 391-395. IEEE Computer Society, (1990)Crouching Dragon, Hidden Software: Software in DOD Weapon Systems.. IEEE Software, 18 (4): 105-107 (2001)Logic design verification via test generation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (1): 138-148 (1988)High Fault Coverage of In-Circuit IC Pin Faults with a Vectorless Test Technique Using Parasitic Transistors.. ITC, page 926. IEEE Computer Society, (1996)Finding I/O Faults on In-Circuit ICs Using Parasitic Transistor Tests.. ITC, page 926. IEEE Computer Society, (1995)The Parallel-Test-Detect Fault Simulation Algorithm., and . ITC, page 712-717. IEEE Computer Society, (1989)Capability Maturity ModelingSM at the SEI., , , , , , and . Softw. Process. Improv. Pract., 2 (1): 21-34 (March 1996)