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A Data Prefetching Mechanism for Object-Oriented Embedded Systems Using Run-Time Profiling.

, , and . DELTA, page 249-254. IEEE Computer Society, (2006)

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A Reconfigurable Cache Architecture for Object-Oriented Embedded Systems., , and . CCECE, page 959-962. IEEE, (2006)Process variation-aware approximation for efficient timing management of digital circuits., , , and . EWDTS, page 1-4. IEEE Computer Society, (2015)Power-aware mapping for reconfigurable NoC architectures., and . ICCD, page 417-422. IEEE, (2007)Virtual Point-to-Point Links in Packet-Switched NoCs., , and . ISVLSI, page 433-436. IEEE Computer Society, (2008)A novel high-performance and low-power mesh-based NoC., , and . IPDPS, page 1-7. IEEE, (2008)The 2D SEM: A novel high-performance and low-power mesh-based topology for networks-on-chip., , and . IJPEDS, 25 (4): 331-344 (2010)Energy-Optimized On-Chip Networks Using Reconfigurable Shortcut Paths., , , and . ARCS, volume 6566 of Lecture Notes in Computer Science, page 231-242. Springer, (2011)A hybrid packet-circuit switched on-chip network based on SDM., , and . DATE, page 566-569. IEEE, (2009)Integrated circuit-packet switching NoC with efficient circuit setup mechanism., , and . J. Supercomput., 71 (8): 2787-2807 (2015)Reconfigurable communication fabric for efficient implementation of neural networks., , and . ReCoSoC, page 1-8. IEEE, (2015)