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Novel high throughput implementation of SHA-256 hash function through pre-computation technique., , , and . ICECS, page 1-4. IEEE, (2005)A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization., , , , , and . IEEE Trans. Signal Process., 59 (12): 6217-6226 (2011)Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy., , , , , , and . J. Signal Process. Syst., 59 (3): 281-296 (2010)Priority Handling Aggregation Technique (PHAT) for Wireless Sensor Networks., , , , , , and . ETFA, page 1-8. IEEE, (2012)A data locality methodology for matrix-matrix multiplication algorithm., , , , , and . J. Supercomput., 59 (2): 830-851 (2012)Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor., , , and . ICECS, page 243-246. IEEE, (2010)Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs., , , , , and . Journal of Circuits, Systems, and Computers, 25 (4): 1650032:1-1650032:26 (2016)A Top-Down Design Methodology for Ultrahigh-Performance Hashing Cores., , , and . IEEE Trans. Dependable Secur. Comput., 6 (4): 255-268 (2009)Optimising the SHA-512 cryptographic hash function on FPGAs., , , and . IET Comput. Digit. Tech., 8 (2): 70-82 (2014)Machine Learning Analysis of Pedestrians' Hazard Anticipation from Eye Tracking Data., , , , and . ATT@IJCAI, volume 3173 of CEUR Workshop Proceedings, page 137-159. CEUR-WS.org, (2022)