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Disambiguation of "Soni, Deepraj"

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RPU: The Ring Processing Unit.

, , , , , , , , , , , , , , , , and . ISPASS, page 272-282. IEEE, (2023)

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Rohit Soni

Soni Pullamsetti

Hardik Soni

Aashish Soni

Rohit Soni

 

Other publications of authors with the same name

NIST Post-Quantum Cryptography- A Hardware Evaluation Study., , , and . IACR Cryptol. ePrint Arch., (2019)Fast and Compact Interleaved Modular Multiplication Based on Carry Save Addition., , , and . ICCAD, page 99:1-99:9. ACM, (2022)Efficient Hardware Implementation of PQC Primitives and PQC algorithms Using High-Level Synthesis., and . ISVLSI, page 296-301. IEEE, (2021)CoFHEE: A Co-processor for Fully Homomorphic Encryption Execution., , , , , , , , and . DATE, page 1-2. IEEE, (2023)Quantifying the Overheads of Modular Multiplication., , , , , and . ISLPED, page 1-6. IEEE, (2023)Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition., , , , , , , , , and 5 other author(s). FMCAD, page 42-52. IEEE, (2021)Design Space Exploration of Modular Multipliers for ASIC FHE accelerators., , , , , , and . ISQED, page 1-8. IEEE, (2023)Power, Area, Speed, and Security (PASS) Trade-Offs of NIST PQC Signature Candidates Using a C to ASIC Design Flow., , , and . ICCD, page 337-340. IEEE, (2019)Optimizing Constrained-Modulus Barrett Multiplier for Power and Flexibility., , , and . VLSI-SoC, page 1-6. IEEE, (2023)RPU: The Ring Processing Unit., , , , , , , , , and 7 other author(s). ISPASS, page 272-282. IEEE, (2023)