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The Case for an Interwoven Parallel Hardware/Software Stack., , , and . SC (Workshops), page 50-59. IEEE, (2021)Compiler-guided instruction-level clock scheduling for timing speculative processors., , , , and . DAC, page 40:1-40:6. ACM, (2018)HELIX-RC: An architecture-compiler co-design for automatic parallelization of irregular programs., , , , , and . ISCA, page 217-228. IEEE Computer Society, (2014)Guess & Sketch: Language Model Guided Transpilation., , , , , , , and . ICLR, OpenReview.net, (2024)Compiling Loop-Based Nested Parallelism for Irregular Workloads., , , , , , , and . ASPLOS (2), page 232-250. ACM, (2024)PROMPT: A Fast and Extensible Memory Profiling Framework., , , , , , and . Proc. ACM Program. Lang., 8 (OOPSLA1): 449-473 (2024)Guide to ILDJIT.. Springer Briefs in Computer Science Springer, (2011)A highly flexible, parallel virtual machine: design and experience of ILDJIT., , , and . Softw. Pract. Exp., 40 (2): 177-207 (2010)Task parallel assembly language for uncompromising parallelism., , , , , , and . PLDI, page 1064-1079. ACM, (2021)A parallel dynamic compiler for CIL bytecode, , and . SIGPLAN Not., 43 (4): 11--20 (2008)