( en | de | ru )

 

Disambiguation of "Jantsch, Axel"

Author of the publication

copydeleteadd this publication to your clipboard
Special issue on networks on chip.

, , and . J. Syst. Archit., 50 (2-3): 61-63 (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Torsten Jantsch

Andreas Jantsch

Jürgen Jantsch

Martin Jantsch

Jürgen Axel

 

Other publications of authors with the same name

Modeling embedded systems and SoCs - concurrency and time in models of computation.. The Morgan Kaufmann series in systems on silicon Elsevier Morgan Kaufmann, (2003)On-Chip Dynamic Resource Management., , , , , , , and . Found. Trends Electron. Des. Autom., 13 (1-2): 1-14 (2019)Hierarchical multipliers: A framework for high-speed multiple error detecting architectures., and . Microelectron. J., (2022)Self-Adaptive QoS Management of Computation and Communication Resources in Many-Core SoCs., , and . ACM Trans. Embed. Comput. Syst., 18 (4): 37:1-37:21 (2019)Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation., , , , , and . PECCS, page 450-458. SciTePress, (2012)Hardware/software partitioning and minimizing memory interface traffic., , , , and . EURO-DAC, page 226-231. IEEE Computer Society, (1994)ISLPED 2023: International Symposium on Low-Power Electronics and Design., , , and . IEEE Des. Test, 41 (1): 93-94 (February 2024)Special issue on networks on chip., , and . J. Syst. Archit., 50 (2-3): 61-63 (2004)Memristors' Potential for Multi-bit Storage and Pattern Learning., , and . EMS, page 450-455. IEEE, (2015)VELS: VHDL E-Learning System for Automatic Generation and Evaluation of Per-Student Randomized Assignments., , and . NORCAS, page 1-7. IEEE, (2018)